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verilog code

$10-30 USD

Cancelado
Publicado hace más de 7 años

$10-30 USD

Pagado a la entrega
write some verilog code
ID del proyecto: 12134294

Información sobre el proyecto

15 propuestas
Proyecto remoto
Activo hace 7 años

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15 freelancers están ofertando un promedio de $25 USD por este trabajo
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dear sir I have more than 9 years experience in digital design using verilog please check my profile also please message me so that we can discuss
$30 USD en 1 día
4,9 (501 comentarios)
8,2
8,2
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Hello
$25 USD en 1 día
4,9 (86 comentarios)
6,3
6,3
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Hi, -FPGA design engineer since last 7 years -Expertise in verilog/VHDL Please find below details of the projects TSMAC Hardware acceleration(3months) The project is to develop hardware acceleration block for TSMAC IP to reduce the overhead created in software for packet creation and detetction. CSI-2 transmitter and receiver(6months) The project is to develop CSI-2 transmitter and receiver IPs according to the mipi standards eMMC Host Controller and Device controller(3months) The project is to develop eMMC host and Device controller IP according to the JEDEC standards. Mobile camera–testing(3months) The project is to develop 3D image processing algorithms on 1K sensor from PMD technologies High resolution camera(6.5months) The project is to develop 2D and 3D image processing algorithms on 100K sensor from Infineon sensor -Test project for DDR2 accesses -Development of calibration module -Development of chain control module -Development of control signal generator -Development of Generic LUT module -Development of Divider radix-2 algorithm -Development of atan calculator -Development of MCB reader state machine Color Pipeline(15months) The project is to develop 2D and 3D image processing algorithms on Aptina sensor -Development of Generic Frame Buffer pCore -Development of data compression and data packing pCore -Development of data packing pCore Video Processing Unit(13 months) -Improvement in algorithms to reduce FPGA resource utilization and decrease latency
$25 USD en 1 día
4,9 (5 comentarios)
4,6
4,6
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Hello, I am quite fresh-minded now from having written lots of Verilog HDL code... so just let me know what I can do for you!
$30 USD en 0 día
4,9 (5 comentarios)
2,9
2,9
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i am having good knowlede about Verilog programming and have done number of projects using Verilog .i have done number of project usinf CPLD and FPGA.i will do your work easily and accurately as soon as possible.
$20 USD en 1 día
4,7 (12 comentarios)
3,3
3,3
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I am a masters graduate from University of west of the England in Electrical engineering. I have a good knowledge in power systems, load flow, system stability as well as system protection. I also have matlab and simulink exposure as well. please specify more details through chat.
$25 USD en 1 día
4,9 (7 comentarios)
2,8
2,8
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I am An Electrical Engineer with experience in Digital Logic Design and their Coding in Verilog. I have done some project in this and worked on Verilog for almost 9 weeks. So,It's my pleasure to do this for you. Looking for your positive response.
$20 USD en 2 días
5,0 (7 comentarios)
2,7
2,7
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hi i am graduate electronics engineer did kind of work your expecting , lets chat and share more info, r mail gurudotuvceonetwoatgmaildotcom. thanks
$35 USD en 1 día
4,2 (4 comentarios)
2,4
2,4
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A proposal has not yet been provided
$30 USD en 3 días
0,0 (0 comentarios)
0,0
0,0
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A proposal has not yet been provided
$20 USD en 5 días
0,0 (0 comentarios)
0,0
0,0
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Hey, i want to try it. I did post graduation in vlsi design and i know verilog.
$15 USD en 1 día
0,0 (0 comentarios)
0,0
0,0

Sobre este cliente

Bandera de INDIA
san antonio, India
5,0
1
Forma de pago verificada
Miembro desde nov 30, 2015

Verificación del cliente

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