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$10 USD / hora
Bandera de ARMENIA
ashtarak, armenia
$10 USD / hora
Aquí son las 11:29 a. m.
Se unió el junio 7, 2015
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Aram S.

@Aram14

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$10 USD / hora
Bandera de ARMENIA
ashtarak, armenia
$10 USD / hora
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Senior Analog & Mixed-Signal Circuit Designer

Analog/Mixed-signal Circuit Design Engineer with over than 7 years of industrial experience in CMOS IC Design. Participated in over 10 projects with high volume productions. Experienced in complete product development from initial conception through design, verification, fabrication & testing. Extensive experience of working with different teams across the world (Canda, Europe, Egypt, Macau, India). TECHNICAL SKILLS: • Analog/mixed-signal circuit with a primary focus on the design of up to 56GB/s SERDES systems (HSIC, USB 2.0, USB 3.0, USB 3.1, PCIE1, PCIE2, PCIE3 PHY's). • Transistor level design and layout supervision of analog building blocks (PLL, High-Speed TX/RX, Crystal Oscillators, full on-chip Precision Current/Voltage References, Multipliers, Opamps, Comparators, Level-Shifters, Voltage Regulators, I/O.). • Experience in deep submicron planar CMOS (from 90nm down to 20nm) and FinFet (16nm, 10nm, 7nm) analog design for the most fabs and processes.

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Experiencia

Senior Analog & Mixed Signal Circuit Design Engineer

Synopsys
ago 2011 - Presente
Porting and debug of USB3.1, USB3.0, USB2.0 & HSIC PHY for various technologies and processes (tsmc10nm, ss10nm, ss14nm, gf14nm, tsmc16nm, tsmc28nm, ss28nm, umc40nm, tsmc55nm, tsmc65nm, gf65nm, etc.) o Transistor level design and layout supervision of analog building blocks (SERDES, High-Speed TX/RX, Crystal Oscillators, full on-chip Precision Current/Voltage References, Opamps, Comparators, Level-Shifters, Voltage Regulators, I/O and etc.)

Educación

Master

Hayastani Petakan Chartaragitakan Hamalsaran, Armenia 2012 - 2014
(2 años)

Bachelor

Hayastani Petakan Chartaragitakan Hamalsaran, Armenia 2008 - 2012
(4 años)

Publicaciones

Multi-rate Clock-Data recovery solution in high speed serial links

2015 IEEE 35th International Conference on Electronics and Nanotechnology (ELNANO)
Clock-Data recovery (CDR) architecture with multirate option in a receiver of a high-speed serial link presented. Proper clock phase choosing and let it track data phase shifts over time are the main difficulties of all kind of CDR structures. This system helps to shift reference clock according to data signal phase to sample it in the most secure way regarding data errors and information loss.

Data — Clock setup and hold times margins correction method in high speed serial links

International Conference on Computer Science and Information Technologies Revised Selected Papers
A method of serial links output data and clock signals setup and hold times correction presented in this paper. The proposed architecture produces corrected clock which has enough setup/hold time margins respect data signal over PVT, which is needed to avoid data errors and setup/hold violations during further operation with data.

Resistance calibration method without external precision elements

IEEE East-West Design & Test Symposium (EWDTS 2014)
A method of resistance calibration without external precision elements usage presented in the paper. In the proposed method, used structures which operation based on technologically accurate elements and signals to have high accuracy resistance after calibration. Architecture produces a calibration code corresponding to 50Ohms PVT compensated termination impedance, which is needed to avoid reflections in transmission lines.

Low power duty cycle adjustment simple method in high speed serial links

2015 IEEE 35th International Conference on Electronics and Nanotechnology (ELNANO)
A low power method of clock signal duty cycle adjustment is presented in this paper. The proposed architecture produces a synchronous signal in the output of the system with 50±1% duty cycle over PVT, which is needed to avoid data error and setup/hold time margins violations during farther operation with data.

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Certificaciones

Analog-Electronics_1.png Analog Electronics 1 75%

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